The cHT-Core allows the user to build devices with coherent caches or adapt custom processors to the coherent interface of the coherent HyperTransport Link. The cHT-Core is a coherent HyperTransport cave device. A cave is an endpoint device in a HyperTransport chain. The core is a low latency device with a queue based application interface. Four queues are provided in each direction:
Scope of delivery
Verilog source code verified with a Virtex FX60 on the HTX-Board.
Computing environment: Iwill DK8-HTX mainboard with LINUX-BIOS.
A constraint file in Xilinx .ucf file format describing the pinout is included.
Currently Supported Platforms
The cHT core is only available under the coherent HyperTransport License from AMD. Please contact AMD for further details about licensing and delivery of the core. The acquiring party will be also obligated to secure a HyperTransport technology license if and by the time any of the party's products based on the cHT-Core is openly promoted or sold. A royalty-free HyperTransport technology license can be acquired by simply becoming a member of the HyperTransport Technology Consortium. Complete information about HyperTransport Consortium membership classes, benefits, fees and application guidelines can be found here.
Last modified: 02.05.2011
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