University of Heidelberg Institute of Computer Engineering



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HT Example Device - Description

The HTX Example Application provides an easy way of testing the HyperTransport core in a real world system. It consists of a comprehensive package including verilog source code, driver and an API to access the hardware. The verilog module can be smoothly plugged onto the HT core and comprises a 64 Byte register file which can be easily accessed by software through the pbAPI. The verilog module implements a finite state machine which is able to process the HyperTransport protocoll supporting both PIO and DMA transfers. The driver and API on the other hand provide the user with a convenient software interface to access the hardware functionality. The HT Example Device is an excellent starting point for developing custom specific devices and co-processors.

Features

  • supports 32 bit and 64 bit read and write PIO transfers
  • supports 32 bit and 64 bit write DMA transfers
  • low latency
  • high bandwidth
  • convenient software interface provided by the pbAPI
  • flexible hardware to support future developments

Scope of delivery

The opensource verilog source code for the example application is released under the modified BSD license section.
The linux driver and API files are released under the GPL (GNU Public Licence).
Both are available free of charge from the download section.

Last modified: 02.02.2018


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Universität Heidelberg
LS Rechnerarchitektur
Prof. Dr. U. Brüning
B6, 26, Building B (3rd floor)
68131 Mannheim
Fon: +49 (0) 621 - 181 2723
Fax: +49 (0) 621 - 181 2713
Email: coeht{at}ziti.uni-heidelberg.de

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