University of Heidelberg Institute of Computer Engineering




HT Verification Environment - Description

The heart of the HT Verification Environment is an HyperTransport 1.0 bus functional model (BFM) from AMD.It provides an easy way of verifying the HyperTransport core and devices with comprehensive simulation. This BFM is freely available to HyperTransport Consortium members.

A simple testbench for the BFM is made available by the CoEHT. This testbench can be used together with the HT core and the example device. Its intention is to be a starting point for user-specific simulation scenarios.

Features

For a complete list of features of the BFM, see the included documentation.

Scope of delivery

The BFM is released under a license from AMD. HT Consortium members may download it from the HTC web site.

Our testbench addition is provided under the modified BSD license. It is available in the download section.

Last modified: 02.05.2011

Supported by



Member of

HTC Logo

Current Projects

Contact

Universität Heidelberg
LS Rechnerarchitektur
Prof. Dr. U. Brüning
B6, 26, Building B (3rd floor)
68131 Mannheim
Fon: +49 (0) 621 - 181 2723
Fax: +49 (0) 621 - 181 2713
Email: coeht{at}ziti.uni-heidelberg.de

Login

Email Address:

Password: