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(Prof. Dr. Ulrich Brüning)
Vorletzte HWE Vorlesung! Mo wtl 10.15-11.45; Ort: B 6 A3.04; Mo wtl 13.45-15.15; Ort: B 6 A3.04; Easter holidays from 06.04.2009 - 17.04.2009. Content: >Introduction to the Principles of Hardware design. The main focus is on the use of Hardware Description Languages like Verilog HDL. Step by step, the design of combinational and sequential logic is presented. And the overall design flow for Integrated Circuits (IC) is discussed. Script: During the semester a script will be available here. Additional script chapters: And some Additional Documents*. Links marked with * can only be accessed locally.
Exercises:
Additional Information:
Last modified: 02.05.2011 |
LecturesSS 12
Digital Semi Custom Design Flow
WS 11/12Functional Verification High Performance Interconnects Entrepreneurship Seminar Hardwareentwurf u. Optik Contact
Universität Heidelberg
LS Rechnerarchitektur Prof. Dr. U. Brüning B6, 26, Building B (3rd floor) 68131 Mannheim Fon: +49 (0) 621 - 181 2723 Fax: +49 (0) 621 - 181 2713 Email: ulrich.bruening {at} ziti.uni-heidelberg.de Delivery Address
Universität Heidelberg
LS Rechnerarchitektur Prof. Dr. U. Brüning B6, 26, Building B (3rd floor) 68159 Mannheim HT Center of Excellence |
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