Ruprecht-Karls-Universität Heidelberg

Design and Implementation of a HyperTransport I/O-Link Controller complying with Specification 3.0

Diploma Thesis by Benjamin Kalisch


This diploma thesis presents the development of a HyperTransport controller that supports revision 3.0 of the HyperTransport specification. It is a continuation of a previously developed controller that supports the HyperTransport revision 2.0 specification. The thesis will give an insight into the HyperTransport protocol in general, and in particular the necessary features for the implementation. It includes a description of the challenges faced during the development. A detailed operation description of the final controller implementation is supplied, and results of the mapping to a field programmable gate array (FPGA) device are given. The controller is verified through simulation and completely implemented with the synthesizable Verilog hardware description language (HDL).


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