Ruprecht-Karls-Universität Heidelberg


Design of a Chip and Modul Testing Environment

Diploma Thesis by Johannes Kohlmann

Abstract:

The testing of hardware and chips is a very important step in their production process. A small failure of a product in field use can cost millions of dollars. To minimize the costs for failures (and their correction), testing in a very early stage of the production process is necessary. In this thesis a cost-effective practical useful solution for an affordable, simply controllable and extendable Test Environment based on PC technology is developed. The environment consists of the board with several testing interfaces, the software for the PC and the concept of the communication between these two components. Devices under Test (DUT) can be testet with JTAG Boundary Scan and Internal Scan. It can be initialized with I2C and FPGAs be programmed.



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