Ruprecht-Karls-Universität Heidelberg

Metric Driven and Formal Verification: A Survey

Diploma Thesis by Martin Tschischauskas


Integrated circuit designs become increasingly complex. More and more functionality can be realized in very small chip sizes. Good verification is very important to detect design flaws as early as possible.

This diploma thesis compares two of the most important types of verification: Metric-driven and formal verification are not only described theoretically, but are also used to verify two hardware modules in the Extoll project. The shared memory functional unit is verified using metric-driven verification with Open Verification Methodology (OVM), while the barrier module is verified with both formal and metric-driven methods.

Besides explaining and using the two types of verification, this thesis also gives some guidance on formal or metric-driven verification. Workflow and best practise advice are given for each of the verification types.


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