Ruprecht-Karls-Universität Heidelberg

Exploration and Evaluation of state of the art interfaces used in FPGAs

Master Thesis by Alexander Jaeger


Since the invention of the integrated circuit large progresses have been made in this field. While the first ones contained just a few transistors, they contain nowadays billions of transistors. Functions, which were implemented with individual chips, can now be integrated into one single chip. With this integration the focus changes from off-chip interconnects to on-chip interconnects. Modern FPGAs allow the implementation of whole systems. The performance of those systems depends very strong on the used interconnects. Topic of this work is the in depth analysis of commonly used state of the art on-chip interconnects in FGPAs. The aim is to analyze and compare these interconnects with each other. A designer, who wants to choose the best interface for his system, should get a detailed guide for doing the right choice. The following questions are answered: Which trends lead to the growing demand on high speed on-chip interconnects? Which interfaces are commonly used in FPGAs today and how do they work? What are the characteristics and performance values regarding bandwidth and latency and in comparison with the other interfaces? What are the advantages and drawbacks of each interface and which is the best interface? The main sources for this work are the interface specifications and intellectual property core data-sheets of the FPGA vendors.


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