Ruprecht-Karls-Universität Heidelberg

Design of a Microcode Engine

Project Report by Fabian Finkeldey


In this research project a microcode engine was developed to give future projects a flexible and powerful module to execute various programs. The microcode engine is a general-purpose unit, that executes a user written program, the microcode, which consists of a sequence of instructions.

With the complexity of the program only limited by the available operations in the instruction set and the maximum program size, this architecture can be used in various use-cases.

The instruction set for this microcode engine uses instructions in a 32-bit fixed length format and follows the RISC-architecture principle. While the instruction set is inspired by the Motorola MC68000 series of microprocessors, it was developed solely for this project. The goal was, to achieve a powerful instruction set while keeping the complexity of the required hardware significantly lower, than in common microprocessors.

The hardware to support the developed instruction set consists of a traditional five stage pipeline: instruction-fetch, instruction-decode, operand-fetch, execution, result-store. The microcode is stored in a separated read-only storage, the control store. The program counter is incremented every cycle, except a branch/jump instruction loads another address. An instruction decoder generates a number of control signals based on the current instruction and routes the given to the appropriate ports of the scratchpad register file. The scratchpad consists of sixteen 64-bit wide registers with two read- and one write-port. The execution-stage of the pipeline consists of an arithmetic-logic-unit (ALU) and a memory interface. The ALU operates on 16-bit immediate values or 64-bit operands stored in the scratchpad registers. Alternatively, the memory interface can be activated in this stage to load and store values from a larger memory pool or external devices, which are mapped into its address space.


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